Phison Ps2251 03 V Datasheet Archive

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• Mar 15, 2018 - Phison Format & Restore designed by Phison Chip Company to allow you to format Phison PS2251-XX chip controller with Low level and high. Kak sdelatj shlem bogatirya svoimi rukami iz bumagi.

  PS2251-03-Q pinout Pin description Pin Name Type Description 1 T2 I,PU Write protect switch input. 0-protect, 1-no protect 2 VCC1A P 1V power rail A 3 VCC1B P 1V power rail B (core?) 4 VIO P NAND IO power rail. Connect to 3.3V or 1.85V supply 5 F0nRE O NAND channel 0 read enable 6 F0nWE O NAND channel 0 write enable 7 F0DQS IO NAND channel 0 data strobe 8 nWP O NAND common write protect 9 F1DQ7 IO NAND channel 1 data 7 10 F1DQ6 IO NAND channel 1 data 6 11 F1DQ5 IO NAND channel 1 data 5 12 F1DQ4 IO NAND channel 1 data 4 13 nCE2 O NAND chip enable 2 14 nCE3 O NAND chip enable 3 15 VIO P NAND IO power rail.

  Connect to 3.3V or 1.85V supply 16 VREG3A P 3V regulator A output. Connect to VCC3HS 17 VBUS P VBUS 5V input to all regulators 18 VREG3B P 3.3V regulator B output. Can be used to supply 3.3V VIO 19 VREG18 P 1.85V regulator output. Can be used to supply 1.8V VIO 20 VCC1B P 1V power rail B (core?) 21 VCC1A P 1V power rail A 22 VCC1B P 1V power rail B (core?) 23 F1DQ3 IO NAND channel 1 data 3 24 F1DQ2 IO NAND channel 1 data 2 25 F0DQ0 IO NAND channel 0 data 0 26 F0DQ1 IO NAND channel 0 data 1 27 F1DQS IO NAND channel 1 data strobe 28 VIO P NAND IO power rail. Connect to 3.3V or 1.85V supply 29 F0DQ2 IO NAND channel 0 data 2 30 F0DQ3 IO NAND channel 0 data 3 31 RnB I NAND common ready/busy 32 F1ALE O NAND channel 1 address latch enable 33 F1CLE O NAND channel 1 command latch enable 34 F0DQ4 IO NAND channel 0 data 4 35 F0DQ5 IO NAND channel 0 data 5 36 F0DQ6 IO NAND channel 0 data 6 37 F0DQ7 IO NAND channel 0 data 7 38 F1nWE O NAND channel 1 write enable 39 F1nRE O NAND channel 1 read enable 40 F1DQ1 IO NAND channel 1 data 1 41 F1DQ0 IO NAND channel 1 data 0 42 VIO P NAND IO power rail. Connect to 3.3V or 1.85V supply 43 VCC1B P 1V power rail B (core?) 44 VCC1B P 1V power rail B (core?) 45 VCC1A P 1V power rail A 46 F0ALE O NAND channel 0 address latch enable 47 F0CLE O NAND channel 0 command latch enable 48 nCE1 O NAND chip enable 1 49 nCE0 O NAND chip enable 0 50 DP IO USB D+ 51 DM IO USB D- 52 VCC3HS P USB transceiver 3V supply.

  

  Connect to VREG3A 53 VCC1HS P USB transceiver 1V supply. Connect to VCC1A 54 XTAL2 C External crystal. Leave unconnected to use internal oscillator 55 XTAL1 C External crystal.

  Leave unconnected to use internal oscillator 56 VCC1SS P USB SS transceiver 1V supply. Connect to VCC1A 57 SSRXM I USB SS RX- 58 SSRXP I USB SS RX+ 59 VCC1SS P USB SS transceiver 1V supply. Connect to VCC1A 60 SSTXM I USB SS TX- 61 SSTXP I USB SS TX+ 62 GND P Ground 63 T5? Leave unconnected 64 LED O LED control Bottom pad is ground Updated 2014-01-10.

  ...'>Phison Ps2251 03 V Datasheet Archive(29.09.2018)

• Mar 15, 2018 - Phison Format & Restore designed by Phison Chip Company to allow you to format Phison PS2251-XX chip controller with Low level and high. Kak sdelatj shlem bogatirya svoimi rukami iz bumagi.

  PS2251-03-Q pinout Pin description Pin Name Type Description 1 T2 I,PU Write protect switch input. 0-protect, 1-no protect 2 VCC1A P 1V power rail A 3 VCC1B P 1V power rail B (core?) 4 VIO P NAND IO power rail. Connect to 3.3V or 1.85V supply 5 F0nRE O NAND channel 0 read enable 6 F0nWE O NAND channel 0 write enable 7 F0DQS IO NAND channel 0 data strobe 8 nWP O NAND common write protect 9 F1DQ7 IO NAND channel 1 data 7 10 F1DQ6 IO NAND channel 1 data 6 11 F1DQ5 IO NAND channel 1 data 5 12 F1DQ4 IO NAND channel 1 data 4 13 nCE2 O NAND chip enable 2 14 nCE3 O NAND chip enable 3 15 VIO P NAND IO power rail.

  Connect to 3.3V or 1.85V supply 16 VREG3A P 3V regulator A output. Connect to VCC3HS 17 VBUS P VBUS 5V input to all regulators 18 VREG3B P 3.3V regulator B output. Can be used to supply 3.3V VIO 19 VREG18 P 1.85V regulator output. Can be used to supply 1.8V VIO 20 VCC1B P 1V power rail B (core?) 21 VCC1A P 1V power rail A 22 VCC1B P 1V power rail B (core?) 23 F1DQ3 IO NAND channel 1 data 3 24 F1DQ2 IO NAND channel 1 data 2 25 F0DQ0 IO NAND channel 0 data 0 26 F0DQ1 IO NAND channel 0 data 1 27 F1DQS IO NAND channel 1 data strobe 28 VIO P NAND IO power rail. Connect to 3.3V or 1.85V supply 29 F0DQ2 IO NAND channel 0 data 2 30 F0DQ3 IO NAND channel 0 data 3 31 RnB I NAND common ready/busy 32 F1ALE O NAND channel 1 address latch enable 33 F1CLE O NAND channel 1 command latch enable 34 F0DQ4 IO NAND channel 0 data 4 35 F0DQ5 IO NAND channel 0 data 5 36 F0DQ6 IO NAND channel 0 data 6 37 F0DQ7 IO NAND channel 0 data 7 38 F1nWE O NAND channel 1 write enable 39 F1nRE O NAND channel 1 read enable 40 F1DQ1 IO NAND channel 1 data 1 41 F1DQ0 IO NAND channel 1 data 0 42 VIO P NAND IO power rail. Connect to 3.3V or 1.85V supply 43 VCC1B P 1V power rail B (core?) 44 VCC1B P 1V power rail B (core?) 45 VCC1A P 1V power rail A 46 F0ALE O NAND channel 0 address latch enable 47 F0CLE O NAND channel 0 command latch enable 48 nCE1 O NAND chip enable 1 49 nCE0 O NAND chip enable 0 50 DP IO USB D+ 51 DM IO USB D- 52 VCC3HS P USB transceiver 3V supply.

  

  Connect to VREG3A 53 VCC1HS P USB transceiver 1V supply. Connect to VCC1A 54 XTAL2 C External crystal. Leave unconnected to use internal oscillator 55 XTAL1 C External crystal.

  Leave unconnected to use internal oscillator 56 VCC1SS P USB SS transceiver 1V supply. Connect to VCC1A 57 SSRXM I USB SS RX- 58 SSRXP I USB SS RX+ 59 VCC1SS P USB SS transceiver 1V supply. Connect to VCC1A 60 SSTXM I USB SS TX- 61 SSTXP I USB SS TX+ 62 GND P Ground 63 T5? Leave unconnected 64 LED O LED control Bottom pad is ground Updated 2014-01-10.

  ...'>Phison Ps2251 03 V Datasheet Archive(29.09.2018)